Polysilicon films formed by Chemical Vapor Deposition (CVD) have wide use in the fabrication of integrated circuits such as microprocessors and memory devices. Polysilicon film deposition processes require adequate physical, chemical, and production-worthy properties. For example, production-worthy properties include uniform thickness and composition for the polysilicon film (e.g., within wafer and wafer-to-wafer), low particulate and chemical contamination, and high throughput for manufacturing. When these properties are met, high electrical performance, reliable, and high yield device wafers can be manufactured at low cost.
In a CVD process, a given composition and flow rate of reactant gases and diluent inert gases are introduced into a reaction chamber containing multiple substrates (e.g., batch furnace). The gas species move to the substrate and the reactants are absorbed on the substrate. The atoms undergo migration and chemically react resulting in a film (e.g., polysilicon) being deposited on the substrate. The un-reacted gases and gaseous by-products of the reaction are desorbed and removed from the reaction chamber. Energy to drive the reactions can be supplied by several methods, (e.g. thermal, photons, catalysis, or plasma). A conventional CVD system typically includes gas sources, gas feed lines, mass-flow controllers, a reaction chamber, a method for heating substrates onto which the film is to be deposited, and temperature sensors. A conventional thermal CVD system utilizes temperature as the primary driver for the reaction of source gases.
In one type of CVD system for polysilicon deposition, a batch of silicon wafers are vertically positioned in a wafer boat for deposition and inserted into a tube-shaped furnace. The wafers are radiantly heated (above 600° C.) by resistive heating coils in the tube. Reactant gases are metered into one end of the tube (e.g., gas inlet) using a mass flow controller. Reaction by-products are pumped out the other end of the tube (e.g., via an exhaust pump).
As semiconductor technology advances, there is a requirement for film deposition to occur at lower and lower temperatures to enable, for example, ultra shallow junctions for sub-100 nanometer (nm) devices. The formation of nano-crystal silicon structures within a film depends on the controlling the size and density of the nano-crystal silicon. One problem with batch furnace systems is that they cannot accommodate nano-crystal film deposition at low temperatures (e.g., below 500° C.). Another problem with batch furnace systems is that they exhibit a disadvantage known as “depletion effects.” Depletion effects reduce gas phase concentrations as reactants are consumed by reactions on wafer surfaces. As such, wafers near the inlet are exposed to higher concentrations of reactant gases. Deposition rates are thus greater for wafers placed near the inlet and uniform thickness is difficult to obtain.